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| Administrator Join Date: Nov 2004 Posts: 2,952 ![]() | There has been a new article posted. Title: The HyperTransport Bus of the Athlon 64 URL: http://www.hardwaresecrets.com/article.php?id=19 Here's a snippet: One of the main differences between the Athlon 64 and 64 FX processors and all the other processors in the market today is that they have an internal circuit called memory controller. In the other processors there is no such circuit, and it is the chipset of the motherboard (more specifically, a circuit called north bridge) that performs the communication ... Comments on this article are welcome. |
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| Junior Member Join Date: Feb 2006 Posts: 1 ![]() | <quote>The HyperTransport bus works at 3,200 MB/s in each direction (as it was explained, this bus uses one transmission path independent from the reception path) and that is why it is listed as being a 6,400 MB/s bus, which is not true and is one of the main misunderstandings published in the market. In brief, it is as if we said that a highway has a speed limit of 130 MPH just because there is a speed limit of 65 MPH in each direction.</quote> you are making the common mistake of confusing "speed" aka "latency" with "throughput". their statement is absolutely true, you are just misunderstanding what they are saying. to take your mixed metaphore to it's rediculous extreme, you are effectively saying "a 1 lane 1 way street with a 65 MPH speedlimit is just as fast as an 8 lane 2 way superhighway with a 65 MPH speedlimit" yes, it's just as fast, FOR ONE CAR. but if you have any traffic at all, or any need for bi-directional traffic, the one lane road is not useful. to put it back in computer terms, on an empty bus, the time (latency) to transmit one packet of data in one direction is the same between the both the unidirectional and bi-directional bus, but the maximum bi-directional throughput differs greatly. their max throughput numbers are absolutely correct. |
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| Junior Member Join Date: Dec 2005 Posts: 1 ![]() | Quote:
Documentation from AMD and the HyperTransport consortium doesn't provide enough detail of the transistion to the HT2.0 spec. The marketing & PR department didn't think it mattered when you just hype the GB/s. * Nvidia nForce5 chipset; * ServerWorks HT-2000 HyperTransport™ SystemI/O™ Controller from Broadcom Corporation; * SiS756 HyperTransport to PCI-E/MuTIOL North Bridge; * AMD-8132™ HyperTransport™ PCI-X® 2.0 Tunnel from AMD; And many others use the HT2.0 spec. From the Wiki Quote:
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| #4 | |
| Administrator Join Date: Oct 2004 USA Posts: 2,553 ![]() | Hi there, Yes, I made a huge mistake stating that AMD processors don't use HT2. I will fix this ASAP. I am studying more about this stuff. Please hold on. And thanks a lot for pointing this out to me. Cheers, Gabriel. |
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| #5 | |
| Administrator Join Date: Oct 2004 USA Posts: 2,553 ![]() | Just to let you guys know that I've just updated our HyperTransport tutorial correcting some mistakes I wrote. Basically, I've said HyperTransport 2.0 was never used on AMD CPUs, which is quite wrong -- all current AMD CPUs are based on HT2 using, however, the lower speed grade provided by this version of HyperTransport. It is just that AMD does not say anything about the HyperTransport version they use on their datasheets, what got me confused. |
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